1. Field of the Invention
This invention relates generally to field-effect transistor structures and, more particularly, to a method of fabricating small gate electrodes for high performance FET structures, and the like.
2. Discussion of the Related Art
In the fabrication of semiconductor devices, for example, metal-oxide semiconductor field effect transistor (MOSFET) devices, relative dimensions of the MOSFET devices is on the order of 0.35 to 0.4 .mu.m for a line width. Such an achievable line width is directly related to the resolution of the lithographic apparatus used for patterning of the specific line width features, such as, using an i-line stepper. Other photolithographic techniques and apparatus are known in the art. For example, x-ray lithography may be used for making masks having 0.35 to 0.4 .mu.m feature sizes thereon. However, as the feature sizes get smaller, the corresponding mask must have a better resolution than the desired feature size. It thus requires, for instance, several days for producing one mask for use in the making of a circuit on a semiconductor wafer.
It would be desirable to have a technique for producing a transistor having an extremely small transistor length, on the order of 0.1 to 0.05 .mu.m, without resort to highly cost prohibitive measures.